High-resolution timer (HRTIM) RM0440
866/2126 RM0440 Rev 4
Figure 191. Timer A timing unit capture circuitry
Auto-delayed mode
This mode allows to have compare events generated relatively to capture events, so that for
instance an output change can happen with a programmed timing following a capture. In
this case, the compare match occurs independently from the timer counter value. It enables
the generation of waveforms with timings synchronized to external events without the need
of software computation and interrupt servicing.
As long as no capture is triggered, the content of the HRTIM_CMPxR register is ignored (no
compare event is generated when the counter value matches the compare value. Once the
capture is triggered, the compare value programmed in HRTIM_CMPxR is summed with the
captured counter value in HRTIM_CPTxyR, and it updates the internal auto-delayed
compare register, as seen on Figure 192. The auto-delayed compare register is internal to
the timing unit and cannot be read. The HRTIM_CMPxR preload register is not modified
after the calculation.
This feature is available only for compare 2 and compare 4 registers. compare 2 is
associated with capture 1, while compare 4 is associated with capture 2. HRTIM_CMP2xR
and HRTIM_CMP4xR compares cannot be programmed with a value below 3 f
HRTIM
clock
periods, as in the regular mode.
MS32265V1
Timer A counter
Prescaler
Capture 1 register
CPT1
(IRQ & DMA)
f
HRTIM
Capture
Capture 1
Trigger
selection
(OR)
Timer B
CMP1
CMP2
TB1 set
TB1 reset
Timer C
Timer D
Timer E
External events 1..10
Timer A Update
Software
4
4
4
10
Timer F
4
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