RM0440 Rev 4 1371/2126
RM0440 General-purpose timers (TIM15/TIM16/TIM17)
1445
Figure 463. PWM dithering pattern
The auto-reload and compare values increments are spread following specific patterns
described in the Table 294 below. The dithering sequence is done to have increments
distributed as evenly as possible and minimize the overall ripple.
MSv47467V1
ARR value
Auto-Reload
value
643
41 40 414140 40
40
40 40 40 4040 40 4040 40
Counter period
CCR1 value
Compare1 value
CCR2 value
Compare2 value
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
322
21 20 20 20 20 20 20 20 21 20 20 20 20 20 20
20
326
21 20 20 20 20 20 21 20 20 20 20
20
21 21 21 21
Table 294. CCR and ARR register change dithering pattern
-PWM period
LSB value12345678910111213141516
0000 ----------------
0001 +1---------------
0010 +1-------+1-------
0011 +1---+1---+1-------
0100 +1---+1---+1---+1---
0101 +1-+1-+1---+1---+1---
0110 +1 - +1 - +1 - - - +1 - +1 - +1 - - -
0111 +1 - +1 - +1 - +1 - +1 - +1 - +1 - - -
1000 +1-+1-+1-+1-+1-+1-+1-+1-
1001 +1+1+1 -+1 -+1 -+1 -+1 -+1 -+1 -
1010 +1 +1 +1 - +1 - +1 - +1 +1 +1 - +1 - +1 -
1011 +1+1+1 -+1+1+1 -+1+1+1 - +1 - +1 -
1100 +1 +1 +1 - +1 +1 +1 - +1 +1 +1 - +1 +1 +1 -
1101 +1 +1 +1 +1 +1 +1 +1 - +1 +1 +1 - +1 +1 +1 -
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