ST STM32G474

High-resolution timer (HRTIM) RM0440
892/2126 RM0440 Rev 4
Figure 217. Latency to external events falling edge (counter reset and output set)
Figure 218. Latency to external events (output reset on external event)
MS32279V1
f
HRTIM
clock
External Event
External Event
after internal
re-synchronisation
HRTIMER
output
12401220120011C0
HRTIMER
counter
HRTIMER
output
Minimal latency
(asynchronous path)
High-resolution pulse with
(Set at counter reset and reset at 0x85)
1 cycle pulselength jitter
EExFAST = 0
EExFAST = 1
11A01190
00 20 40 60 80 A0 C0
3 cycles delay
Jitter-less High-resolution pulse
(Set at counter reset and reset at 0x85)
5-6 cycles delay
total latency
Counter reset
2-3 cycles delay
MS32293V1
f
HRTIM
clock
External Event
External Event
after internal
re-synchronisation
2-3 cycles delay
5-6 cycles delay total
HRTIMER
output
HRTIMER
output
Minimal latency
(asynchronous path)
EExFAST = 0
EExFAST = 1