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ST STM32G474

ST STM32G474
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RM0440 Rev 4 847/2126
RM0440 High-resolution timer (HRTIM)
1083
Note: As a writing convention, references to the 6 timing units in the text and in registers are
generalized using the “x” letter, where x can be any value from A to F.
The block diagram of the timer is shown in Figure 182.
Figure 182. High-resolution timer overview
MSv47425V3
Set/reset
crossbar
(a timer
controls
2 outputs)
hrtim_in_sync[3:1]
hrtim_out_sync[3:1]
HRTIM_FLT[6:1],
hrtim_in_flt[6:1],
hrtim_sys_flt
hrtim_adc_trg[10:1]
hrtim_it[8:1]
hrtim_dma[7:1]
Cross-timer counter reset bus
APB bus
hrtim_pclk
hrtim_ker_ck
hrtim_dac_trg[3:1]
……..
hrtim_eev1[4:1]
hrtim_eev10[4:1]
hrtim_dac_step_trig[A:F]
hrtim_dac_reset_trig [A:F]
TIMER FReset
Event
blanking
window
4xCMP
2xCPT
1
4
10
TIMER EReset
Event
blanking
window
4xCMP
2xCPT
1
4
10
TIMER DReset
Event
blanking
window
4xCMP
2xCPT
1
4
10
TIMER CReset
Event
blanking
window
4xCMP
2xCPT
1
4
10
TIMER BReset
Event
blanking
window
4xCMP
2xCPT
1
4
10
TIMER AReset
Event
blanking
window
4xCMP
2xCPT
1
5
10
Master timer
APB and
peripheral
interface
DMA burst
controller
Burst mode
controller
Run/idle
Run/idle
Run/idle
Run/idle
Run/idle
Run/idle
Output
stage
HRTIM_CHA1
HRTIM_CHA2
HRTIM_CHB1
HRTIM_CHB2
HRTIM_CHC1
HRTIM_CHC2
HRTIM_CHD1
HRTIM_CHD2
HRTIM_CHE1
HRTIM_CHE2
HRTIM_CHF1
HRTIM_CHF2
External events
conditioning
Fault
conditioning
10 5
6
4
10
6
6
3
7
6
hrtim_
upd_en[3:1]
hrtim_
bm_trg
hrtim_
bm_ck
6 (EEV1_muxout…EEV6_muxout)

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