General-purpose timers (TIM2/TIM3/TIM4/TIM5) RM0440
1258/2126 RM0440 Rev 4
Figure 387. Output compare mode, toggle on tim_oc1
29.4.11 PWM mode
Pulse width modulation mode allows to generate a signal with a frequency determined by
the value of the TIMx_ARR register and a duty cycle determined by the value of the
TIMx_CCRx register.
The PWM mode can be selected independently on each channel (one PWM per tim_ocx
output) by writing 110 (PWM mode 1) or ‘111 (PWM mode 2) in the OCxM bits in the
TIMx_CCMRx register. The corresponding preload register must be enabled by setting the
OCxPE bit in the TIMx_CCMRx register, and eventually the auto-reload preload register (in
upcounting or center-aligned modes) by setting the ARPE bit in the TIMx_CR1 register.
As the preload registers are transferred to the shadow registers only when an update event
occurs, before starting the counter, all registers must be initialized by setting the UG bit in
the TIMx_EGR register.
tim_ocx polarity is software programmable using the CCxP bit in the TIMx_CCER register. It
can be programmed as active high or active low. tim_ocx output is enabled by the CCxE bit
in the TIMx_CCER register. Refer to the TIMx_CCERx register description for more details.
In PWM mode (1 or 2), TIMx_CNT and TIMx_CCRx are always compared to determine
whether TIMx_CCRx ≤ TIMx_CNT or TIMx_CNT ≤ TIMx_CCRx (depending on the direction
of the counter). The tim_ocref_clr can be cleared by an external event through the
tim_etr_in or the tim_oceref_clr signals. In this case the tim_ocref_clr signal is asserted
only:
• After a compare match event
• When the output compare mode (OCxM bits in TIMx_CCMRx register) switches from
the “frozen” configuration (no comparison, OCxM=‘000) to one of the PWM modes
(OCxM=‘110 or ‘111). This forces the PWM by software while the timer is running.
The timer is able to generate PWM in edge-aligned mode or center-aligned mode
depending on the CMS bits in the TIMx_CR1 register.
MSv62326V1
tim_oc1ref = tim_oc1
CNT
B200 B201
0039
CCR1
003A
Write B201h in the CC1R register
Match detected on CCR1
Interrupt generated if enabled
003B
B201
003A
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