EasyManuals Logo
Home>ST>Microcontrollers>STM32G474

ST STM32G474 User Manual

ST STM32G474
2126 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1200 background imageLoading...
Page #1200 background image
Advanced-control timers (TIM1/TIM8/TIM20) RM0440
1200/2126 RM0440 Rev 4
Bit 1 CC1P: Capture/compare 1 output polarity
CC1 channel configured as output:
0: tim_oc1 active high
1: tim_oc1 active low
CC1 channel configured as input: CC1NP/CC1P bits select the active polarity of
tim_ti1fp1 and tim_ti2fp1 for trigger or capture operations.
00: non-inverted/rising edge. The circuit is sensitive to tim_tixfp1 rising edge (capture or
trigger operations in reset, external clock or trigger mode), tim_tixfp1 is not inverted
(trigger operation in gated mode or encoder mode).
01: inverted/falling edge. The circuit is sensitive to tim_tixfp1 falling edge (capture or trigger
operations in reset, external clock or trigger mode), tim_tixfp1 is inverted (trigger
operation in gated mode or encoder mode).
10: reserved, do not use this configuration.
11: non-inverted/both edges/ The circuit is sensitive to both tim_tixfp1 rising and falling
edges (capture or trigger operations in reset, external clock or trigger mode), tim_tixfp1
is not inverted (trigger operation in gated mode). This configuration must not be used in
encoder mode.
Note: This bit is not writable as soon as LOCK level 2 or 3 has been programmed (LOCK bits
in TIMx_BDTR register).
Note: On channels having a complementary output, this bit is preloaded. If the CCPC bit is
set in the TIMx_CR2 register then the CC1P active bit takes the new value from the
preloaded bit only when a Commutation event is generated.
Bit 0 CC1E: Capture/compare 1 output enable
CC1 channel configured as output:
0:Off - tim_oc1 is not active. tim_oc1 level is then function of MOE, OSSI, OSSR, OIS1,
OIS1N and CC1NE bits.
1:On - tim_oc1 signal is output on the corresponding output pin depending on MOE, OSSI,
OSSR, OIS1, OIS1N and CC1NE bits.
CC1 channel configured as input: This bit determines if a capture of the counter value can
actually be done into the input capture/compare register 1 (TIMx_CCR1) or not.
0: Capture disabled.
1: Capture enabled.
Note: On channels having a complementary output, this bit is preloaded. If the CCPC bit is
set in the TIMx_CR2 register then the CC1E active bit takes the new value from the
preloaded bit only when a Commutation event is generated.

Table of Contents

Questions and Answers:

ST STM32G474 Specifications

General IconGeneral
BrandST
ModelSTM32G474
CategoryMicrocontrollers
LanguageEnglish

Related product manuals