Real-time clock (RTC) RM0440
1554/2126 RM0440 Rev 4
The calendar is saved in the timestamp registers (RTC_TSSSR, RTC_TSTR, RTC_TSDR)
when an internal timestamp event is detected. The internal timestamp event is generated by
the switch to the V
BAT
supply.
When a timestamp event occurs, due to internal or external event, the timestamp flag bit
(TSF) in RTC_SR register is set. In case the event is internal, the ITSF flag is also set in
RTC_SR register.
By setting the TSIE bit in the RTC_CR register, an interrupt is generated when a timestamp
event occurs.
If a new timestamp event is detected while the timestamp flag (TSF) is already set, the
timestamp overflow flag (TSOVF) flag is set and the timestamp registers (RTC_TSTR and
RTC_TSDR) maintain the results of the previous event.
Note: TSF is set 2 ck_apre cycles after the timestamp event occurs due to synchronization
process.
There is no delay in the setting of TSOVF. This means that if two timestamp events are
close together, TSOVF can be seen as '1' while TSF is still '0'. As a consequence, it is
recommended to poll TSOVF only after TSF has been set.
Caution: If a timestamp event occurs immediately after the TSF bit is supposed to be cleared, then
both TSF and TSOVF bits are set. To avoid masking a timestamp event occurring at the
same moment, the application must not write 0 into TSF bit unless it has already read it to 1.
Optionally, a tamper event can cause a timestamp to be recorded. See the description of the
TAMPTS control bit in the RTC control register (RTC_CR).
35.3.15 Calibration clock output
When the COE bit is set to 1 in the RTC_CR register, a reference clock is provided on the
CALIB device output.
If the COSEL bit in the RTC_CR register is reset and PREDIV_A = 0x7F, the CALIB
frequency is f
RTCCLK
/64
. This corresponds to a calibration output at 512 Hz for an RTCCLK
frequency at 32.768 kHz. The CALIB duty cycle is irregular: there is a light jitter on falling
edges. It is therefore recommended to use rising edges.
When COSEL is set and “PREDIV_S+1” is a non-zero multiple of 256 (i.e: PREDIV_S[7:0] =
0xFF), the CALIB frequency is f
RTCCLK/(256 * (PREDIV_A+1)). This corresponds to a
calibration output at 1 Hz for prescaler default values (PREDIV_A = Ox7F, PREDIV_S =
0xFF), with an RTCCLK frequency at 32.768 kHz.
Note: When the CALIB output is selected, the RTC_OUT1 pin is automatically configured but the
RTC_OUT2 pin must be set as alternate function.
When COSEL is cleared, the CALIB output is the output of the 6
th
stage of the
asynchronous prescaler.
When COSEL is set, the CALIB output is the output of the 8
th
stage of the synchronous
prescaler.
35.3.16 Tamper and alarm output
The OSEL[1:0] control bits in the RTC_CR register are used to activate the alarm output
TAMPALRM, and to select the function which is output. These functions reflect the contents
of the corresponding flags in the RTC_SR register.
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