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ST STM32G474 User Manual

ST STM32G474
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Independent watchdog (IWDG) RM0440
1930/2126 RM0440 Rev 4
When the independent watchdog is started by writing the value 0x0000 CCCC in the IWDG
key register (IWDG_KR), the counter starts counting down from the reset value of 0xFFF.
When it reaches the end of count value (0x000) a reset signal is generated (IWDG reset).
Whenever the key value 0x0000 AAAA is written in the IWDG key register (IWDG_KR), the
IWDG_RLR value is reloaded in the counter and the watchdog reset is prevented.
Once running, the IWDG cannot be stopped.
42.3.2 Window option
The IWDG can also work as a window watchdog by setting the appropriate window in the
IWDG window register (IWDG_WINR).
If the reload operation is performed while the counter is greater than the value stored in the
IWDG window register (IWDG_WINR), then a reset is provided.
The default value of the IWDG window register (IWDG_WINR) is 0x0000 0FFF, so if it is not
updated, the window option is disabled.
As soon as the window value is changed, a reload operation is performed in order to reset
the downcounter to the IWDG reload register (IWDG_RLR) value and ease the cycle
number calculation to generate the next reload.
Configuring the IWDG when the window option is enabled
1. Enable the IWDG by writing 0x0000 CCCC in the IWDG key register (IWDG_KR).
2. Enable register access by writing 0x0000 5555 in the IWDG key register (IWDG_KR).
3. Write the IWDG prescaler by programming IWDG prescaler register (IWDG_PR) from
0 to 7.
4. Write the IWDG reload register (IWDG_RLR).
5. Wait for the registers to be updated (IWDG_SR = 0x0000 0000).
6. Write to the IWDG window register (IWDG_WINR). This automatically refreshes the
counter value in the IWDG reload register (IWDG_RLR).
Note: Writing the window value allows the counter value to be refreshed by the RLR when IWDG
status register (IWDG_SR) is set to 0x0000 0000.
Configuring the IWDG when the window option is disabled
When the window option it is not used, the IWDG can be configured as follows:
1. Enable the IWDG by writing 0x0000 CCCC in the IWDG key register (IWDG_KR).
2. Enable register access by writing 0x0000 5555 in the IWDG key register (IWDG_KR).
3. Write the prescaler by programming the IWDG prescaler register (IWDG_PR) from 0 to
7.
4. Write the IWDG reload register (IWDG_RLR).
5. Wait for the registers to be updated (IWDG_SR = 0x0000 0000).
6. Refresh the counter value with IWDG_RLR (IWDG_KR = 0x0000 AAAA).

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ST STM32G474 Specifications

General IconGeneral
BrandST
ModelSTM32G474
CategoryMicrocontrollers
LanguageEnglish

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