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Intel Xeon User Manual

Intel Xeon
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INTEL(R) E7500 CHIPSET CUSTOMER REFERENCE SCHEMATICS
R
D
C
B
B
D
C
1
12345678
2345678
A
A
LAST REVISED:
1900 Prairie City Road
Folsom, California 095630
TITLE:
Platform Apps Engineering
SHEET
03/04/02
WITH 512KB L2 CACHE
INTEL(R) XEON(TM) PROCESSOR
Intel(R)
(MCH)
LAN controller
Hot Plug
PCI-X
PCI-X
P64H2
DDR DIMM
DDR DIMM
66MHz
HI 2.0
HI 2.0
HI 2.0
USB Ports
33MHz PCI
PS2 KB/Mouse Floppy
Super I/O
FWH
Serial /
Parallel
LPC
HI 1.5
Bus A
Bus B
Bus A
Device B
Bus B
Page 76
Pages 31-34
Pages 4-9
Pages 10-14
Pages 15-26
133MHz
PCI-X Slot1
PCI-X Slot2
Device A
PCI-X
133MHz PCI-X
Page 47
Pages 69-71
100MHz
Switches
Page 48
Bus
Page 42
Pages 27-30
Logic
Hot Plug
Pages 38,40,41
Bus
Switches
Pages 43-46
Logic
Pages 49-52
Pages 53-56
Pages 58-59
Page 57
IDE Port
Pages 67-68
Pages 37,39
PCI-X Slots A:D
SMBus
32-bit PCI Slot
For Debug Only
Page 66
SMBus
Simplified System Block Diagram
Intel (R)
82870P2
(P64H2)
# 1
# 2
Intel(R)
PCI-X Slot D extension
E7500 Chipset
Memory Controller Hub
Intel(R)
82544EI
82801CA
I/O Controller Hub
(ICH3-S)
SCSI
Controller
PCI Video
On board
INTEL(R) XEON(TM) PROCESSOR
WITH 512KB L2 CACHE
3

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Intel Xeon Specifications

General IconGeneral
BrandIntel
ModelXeon
CategoryProcessor
LanguageEnglish

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