Intel Xeon User Manual

FWH_PLCC32
FGPI0
FGPI1
FGPI2
FGPI3
DQ7_RFU
DQ6_RFU
DQ5_RFU
ID3
ID2
ID1
FWH0
FWH1
FWH2
FWH3
GND1
GND0
GNDA
VCC1
VCC0
WP
TBL
IC
RST
CLK
FWH4
ID0
DQ4_RFU
RY_BY_RFU
FGPI4
INIT
VPP
VCCA
FIRMWARE HUB
+V3_3
+V3_3
+V3_3
+V12
1
3 2
+V3_3
+V3_3
+V3_3
INTEL(R) E7500 CHIPSET CUSTOMER REFERENCE SCHEMATICS
R
D
C
B
B
D
C
1
12345678
2345678
A
A
LAST REVISED:
1900 Prairie City Road
Folsom, California 095630
TITLE:
Platform Apps Engineering
SHEET
03/04/02
2N3904_DUAL
+
Jumper
No
1 - 2
WP Jumper Settings
3 - 4
TOP BLOCK PROTECT
BLOCK 2-8 PROTECT
WRITE ENABLE
ALL BLOCKS
FWH
Place C893-895 near pins 1, 25 and 32
ICH3_INIT_N
4,6,9,53
R493
470
R484
470
R492
300
C895
0.1UF 0.1UF
C894 C893
0.1UF
12
C711
4.7UF
ICH3_LFRAME_N
54,67
ICH3_PCIRST_N
53,56-58,67
R_ICH3_INIT_N
36
52
41
Q33
TP_FWH_03_6
2
1
3
4
J27
R496
4.7K
R495
4.7K
R494
4.7K
R491
1K
R490
4.7K
R489
10K
1
3
2
Q20
673755-002
FET
R488
100
R487
4.7K
R486
4.7K
R485
4.7K
R483
1K
R482
10K
FWH_WP_N
FWH_INIT_N
FWH_CLK33
65
FWH_J4BIT_1
FWH_J4BIT_4
FWH_IC
FWH_TBL_N
FWH_FGP_14
FWH_FGP_13
FWH_FGP_12
FWH_FGP_11
FWH_FGP_106
5
4
3
21
20
19
9
10
11
13
14
15
17
26
16
28
25
32
7
8
29
2
31
23
12
18
22
30
24
1
27
U69
ICH3_LAD1
ICH3_LAD2
ICH3_LAD[3:0]
54,67
ICH3_LAD0
ICH3_LAD3
66

Intel Xeon Specifications

General

Brand	Intel
Model	Xeon
Category	Processor
Language	English