Microchip Technology dsPIC30F - Page 298

dsPIC30F Family Reference Manual
DS70061C-page 14-16 © 2004 Microchip Technology Inc.
Example 14-4 shows example code for configuration of the continuous output pulse event.
Example 14-4: Continuous Output Pulse Setup and Interrupt Servicing
; The following code example will set the Output Compare 1 module
; for interrupts on the continuous pulse event and select Timer 2
; as the clock source for the compare time-base. It is assumed
; that Timer 2 and Period Register 2 are properly configured.
; Timer 2 will be enabled here.
CLR OC1CON ; Turn off Output Compare 1 Module.
MOV #0x0005, W0 ; Load the working register with the new
MOV W0, OC1CON ; compare mode and write to OC1CON
MOV #0x3000, W0 ; Initialize Compare Register 1
MOV W0, OC1R ; with 0x3000
MOV #0x3003, W0 ; Initialize Secondary Compare Register 1
MOV W0, OC1RS ; with 0x3003
BSET IPC0, #OC1IP0 ; Setup Output Compare 1 interrupt for
BCLR IPC0, #OC1IP1 ; desired priority level
BCLR IPC0, #OC1IP2 ; (this example assigns level 1 priority)
BCLR IFS0, #OC1IF ; Clear Output Compare 1 interrupt flag
BSET IEC0, #OC1IE ; Enable Output Compare 1 interrupts
BSET T2CON, #TON ; Start Timer2 with assumed settings
; Example code for Output Compare 1 ISR:
__OC1Interrupt:
BCLR IFS0, #OC1IF ; Reset respective interrupt flag
; Remaining user code here
RETFIE ; Return from ISR