© 2004 Microchip Technology Inc. DS70049C-page 2-25
Section 2. CPU
CPU
2
2.6.3.4 Accumulator ‘Write Back’
The MAC and MSC instructions can optionally write a rounded version of the accumulator that is
not the target of the current operation into data space memory. The write is performed across the
X-bus into combined X and Y address space. This accumulator write back feature is beneficial
in certain FFT and LMS algorithms.
The following Addressing modes are supported by the accumulator write back hardware:
1. W13, register direct:
The rounded contents of the non-target accumulator are written into W13 as a 1.15
fractional result.
2. [W13]+=2, register indirect with post-increment:
The rounded contents of the non-target accumulator are written into the address pointed
to by W13 as a 1.15 fraction. W13 is then incremented by 2.
2.6.4 Round Logic
The round logic can perform a conventional (biased) or convergent (unbiased) round function
during an accumulator write (store). The Round mode is determined by the state of the RND
(CORCON<1>) bit. It generates a 16-bit, 1.15 data value, which is passed to the data space write
saturation logic. If rounding is not indicated by the instruction, a truncated 1.15 data value is
stored.
The two Rounding modes are shown in Figure 2-11. Conventional rounding takes bit 15 of the
accumulator, zero-extends it and adds it to the MSWord excluding the guard or overflow bits (bits
16 through 31). If the LSWord of the accumulator is between 0x8000 and 0xFFFF (0x8000
included), the MSWord is incremented. If the LSWord of the accumulator is between 0x0000 and
0x7FFF, the MSWord is left unchanged. A consequence of this algorithm is that over a
succession of random rounding operations, the value will tend to be biased slightly positive.
Convergent (or unbiased) rounding operates in the same manner as conventional rounding
except when the LSWord equals 0x8000. If this is the case, the LSbit of the MSWord (bit 16 of
the accumulator) is examined. If it is ‘1’, the MSWord is incremented. If it is ‘0’, the MSWord is
not modified. Assuming that bit 16 is effectively random in nature, this scheme will remove any
rounding bias that may accumulate.
The SAC and SAC.R instructions store either a truncated (SAC) or rounded (SAC.R) version of
the contents of the target accumulator to data memory via the X-bus (subject to data saturation,
see Section 2.6.3.3 “Data Space Write Saturation”).
Note that for the MAC class of instructions, the accumulator write back data path is always subject
to rounding.
Figure 2-11: Conventional and Convergent Rounding Modes
01516
01516
01516
01516
1000 0000 0000 0000
1XXX XXXX XXXX XXXX
0XXX XXXX XXXX XXXX
1000 0000 0000 0000
1
0
Conventional (Biased) Convergent (Unbiased)
Round Up (add 1 to MSWord) when:
Round Down (add nothing) when:
Round Up (add 1 to MSWord) when:
1. LSWord = 0x8000 and bit 16 = 1
2. LSWord > 0x8000
LSWord >= 0x8000
LSWord < 0x8000
Round Down (add nothing) when:
1. LSWord = 0x8000 and bit 16 = 0
2. LSWord < 0x8000
MSWord
MSWord
MSWord
MSWord
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