dsPIC30F Family Reference Manual
DS70074C-page 26-6 © 2004 Microchip Technology Inc.
Figure A-6 and Figure A-7 illustrate master-transmitter and master-receiver data transfer
sequences.
Figure A-6: Master-Transmitter Sequence
Figure A-7: Master-Receiver Sequence
For 7-bit address:
S
Slave Address
(Code + A9:A8)
SR/W
A1 Slave Address
(A7:A0)
A2
Data A Data P
A master transmitter addresses a slave receiver
with a 10-bit address.
A/A
Slave Address R/W AData A Data A/AP
'0' (write) data transferred
(n bytes - acknowledge)
A master transmitter addresses a slave receiver with a
7-bit address. The transfer direction is not changed.
From master to slave
From slave to master
A = acknowledge (SDA low)
A
= not acknowledge (SDA high)
S = Start Condition
P = Stop Condition
(write)
For 10-bit address:
For 7-bit address:
S
Slave Address
(Code + A9:A8)
SR/W
A1 Slave Address
(A7:A0)
A2
A master transmitter addresses a slave receiver
with a 10-bit address.
Slave Address R/W
AData AData A P
'1' (read) data transferred
(n bytes - acknowledge)
A master reads a slave immediately after the first byte.
From master to slave
From slave to master
A = acknowledge (SDA low)
A
= not acknowledge (SDA high)
S = Start Condition
P = Stop Condition
(write)
For 10-bit address:
Slave Address
(Code + A9:A8)
Sr R/W A3 AData A PData
(read)