ST STM32G474 User Manual (English)

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Extended interrupts and events controller (EXTI) RM0440

454/2126 RM0440 Rev 4

Bits 22: 19 SWIx: Software interrupt on line x (x = 22 o 19)

If the interrupt is enabled on this line in the EXTI_IMR, writing a '1' to this bit

when it is at '0' sets the corresponding pending bit in EXTI_PR resulting in an

interrupt request generation.

This bit is cleared by clearing the corresponding bit in the EXTI_PR register (by

writing a ‘1’ into the bit).

Bit 18 Reserved, must be kept at reset value.

Bits 17:0 SWIx: Software interrupt on line x (x = 17 to 0)

If the interrupt is enabled on this line in the EXTI_IMR, writing a '1' to this bit

when it is at '0' sets the corresponding pending bit in EXTI_PR resulting in an

interrupt request generation.

This bit is cleared by clearing the corresponding bit of EXTI_PR (by writing a ‘1’

into the bit).

ST STM32G474 User Manual