C: Status model Model 2461 Interactive SourceMeter® Instrument
C-14 2461-901-01 A/November 2015
Serial polling and SRQ
Any enabled event summary bit that goes from 0 to 1 sets bit B6 and generates a service request
(SRQ).
In your test program, you can periodically read the Status Byte to check if an SRQ has occurred and
what caused it. If an SRQ occurs, the program can, for example, branch to an appropriate subroutine
that will service the request.
SRQs can be managed by the serial poll sequence of the instrument. If an SRQ does not occur, bit
B6 (RQS) of the Status Byte Register remains cleared, and the program proceeds normally after the
serial poll is performed. If an SRQ does occur, bit B6 of the Status Byte Register is set, and the
program can branch to a service subroutine when the SRQ is detected by the serial poll.
The serial poll automatically resets RQS of the Status Byte Register. This allows subsequent serial
polls to monitor bit B6 for an SRQ occurrence that is generated by other event types.
For common commands and TSP commands, B6 is the MSS (Message Summary Status) bit. The
serial poll does not clear the MSS bit. The MSS bit remains set until all enabled Status Byte Register
summary bits are reset.
For information on serial polling on a GPIB system, see SPE, SPD (on page 2-61).
Programming enable registers
You can program the bits in the enable registers of the Status Model registers.
When you program an enable register bit to 0, no action occurs if the bits in the corresponding
registers are set (1).
When you program an enable register bit to 1, if the bits in the corresponding registers are set (1), the
AND condition occurs and a bit in the Status Byte Register is set to (1).
You must program all bits in an enable register at the same time. This means you need to determine
what each bit value in the register will be, then add them together to determine the value of all the bits
in the register. See Understanding bit settings (on page C-16) for more information on determining
the value of the bits in the registers.
For example, you might want to enable the Standard Event Register to set the ESB bit in the Status
Byte Register whenever an operation complete occurs or whenever an operation did not execute
properly because of an internal condition. To do this, you need to set bits 0 and 3 of the Standard
Event Register to 1. These bits have decimal values of 1 and 8, so to set both bits to 1, you set the
register to 9.
Using SCPI:
Send the command:
*ese 9
Using TSP
Send the command:
status.standard.enable = 9
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