STC8A8K64D4 Series Manual
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SETB ES
SETB EA
MOV R0,#BGV
MOV A,@R0 ;Read the high byte of the internal reference voltage
LCALL UART_SEND
INC R0
MOV A,@R0 ;Read the low byte of the internal reference voltage
LCALL UART_SEND
LOOP:
JMP LOOP
END
7.5.4 Read the Unique ID (Read from CHIPID)
C language code
//Operating frequency for test is 11.0592MHz
#include "reg51.h"
#include "intrins.h"
#define FOSC 11059200UL
#define BRT (65536 - FOSC / 115200 / 4)
#define CPUIDBASE 0xfde0
#define ID_ADDR ((unsigned char volatile xdata *)(CPUIDBASE + 0x00))
#define VREF_ADDR (*(unsigned int volatile xdata *)(CPUIDBASE + 0x07))
#define F32K_ADDR (*(unsigned int volatile xdata *)(CPUIDBASE + 0x09))
#define T22M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x0b)) //22.1184MHz
#define T24M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x0c)) //24MHz
#define T20M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x0d)) //20MHz
#define T27M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x0e)) //27MHz
#define T30M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x0f)) //30MHz
#define T33M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x10)) //33.1776MHz
#define T35M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x11)) //35MHz
#define T36M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x12)) //36.864MHz
#define T40M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x13)) //40MHz
#define T45M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x14)) //45MHz
#define VRT6M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x15)) //VRTRIM_6M
#define VRT10M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x16)) //VRTRIM_10M
#define VRT27M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x17)) //VRTRIM_27M
#define VRT44M_ADDR (*(unsigned char volatile xdata *)(CPUIDBASE + 0x18)) //VRTRIM_44M
sfr AUXR = 0x8e;
sfr P_SW2 = 0xba;
sfr P0M1 = 0x93;
sfr P0M0 = 0x94;
sfr P1M1 = 0x91;
sfr P1M0 = 0x92;
sfr P2M1 = 0x95;
sfr P2M0 = 0x96;
sfr P3M1 = 0xb1;
sfr P3M0 = 0xb2;
sfr P4M1 = 0xb3;