STC8A8K64D4 Series Manual
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6.3 System reset
There are two types of resets in STC8A8K64D4 series of microcontrollers, hardware reset and software reset.
When hardware reset occurs, all registers are reset to their original values and the system rereads all hardware options.
At the same time, after being powered on, the system will wait for some time according to the hardware power-on wait time
option set. Hardware reset includes,
⚫ Power-on reset, POR, about 1.7V
⚫ Low-voltage detection reset, LVD-RESET (2.0V, 2.4V, 2.7V, 3.0V)
⚫ RST pin reset (Low-level reset)
⚫ Watch-Dog-Timer reset
When software reset occurs, all the registers values are reset to the initial value except that the clock-related registers
remain unchanged. Software reset does not re-read all hardware options. Software reset mainly includes,
⚫ Write SWRST bit in IAP_CONTR register to trigger reset
Related registers
Watchdog control register
Reset Configuration Registe
6.3.1 Watch dog timer reset (WDT_CONTR)
In industrial/automotive electronic control/aerospace need high reliability in the system, in order to prevent "system in
exceptional cases, the disturbance of MCU/CPU program run fly, resulting in abnormal system for a long time work", is
usually introduced watchdog, if the MCU/CPU is not within the stipulated time visit watchdog, according to the requirement
as MCU/CPU in abnormal state, the watchdog will force MCU/CPU reset, enables the system to perform user program from
the very beginning.
The STC8 series Guard Dog reset is one of the hardware reset in thermal boot reset. STC8 series SCM introduces this
function, which makes the reliability design of SCM system more convenient and simple. After the reset state of STC8 series
watchdog, the system is fixed to start from THE ISP monitor area, independent of the SWBS of IAP_CONTR register before
the reset of watchdog (Note: This is different from STC15 series MCU).
WDT_CONTR (Watchdog control register)
WDT_FLAG : WDT reset flag.
When WDT overflows, this bit is set by hardware automatically. This bit should be cleared by software.
EN_WDT: WDT enable bit.
0: No operation
1: WDT is started.
Note: The watchdog timer can be started by software or hardware automatically. Once the watchdog timer is started, the
software cannot be shut down. The SCM must be recharged before it can be shut down. Software to start the watchdog
only needs to write 1 to the EN_WDT bit. If you need the hardware to boot the watchdog, you need to set it up at your ISP
when you download it, as shown in the figure below:
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