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STC micro STC8A8K64D4 Series - Main Clock Output Control Register (MCLKOCR)

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STC8A8K64D4 Series Manual
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of the oscillator to become stable. The clock controller will set the IRC32KST flag automatically after the internal
oscillator frequency stabilizes. When the user program needs to switch the clock to the internal 32KHz low speed IRC,
ENIRC32K must be set at first to enable the oscillator and then keep polling the oscillator stable flag IRC32KST until
the flag changes to 1.
6.1.6 Main clock output control register (MCLKOCR)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
MCLKOCR
FE05H
MCLKO_S
MCLKODIV[6:0]
MCLKODIV[6:0]: Main clock output division factor
(Note: The clock source of main clock output is system clock divided by CLKDIV)
MCLKODIV[6:0]
Divided system clock output frequency
0000000
No clock out
0000001
SYSClk/1
0000010
SYSClk /2
0000011
SYSClk /3
1111110
SYSClk /126
1111111
SYSClk /127
MCLKO_S: Main clock output pin selection
0: Main clock output to P5.4
1: Main clock output to P1.6

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