STC micro STC8A8K64D4 Series - Timer 4 8-Bit Prescaler Register (TM4 PS); Timer 3 Working Mode; Timer 4 Working Mode

STC8A8K64D4 Series Manual
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13.4.5 Timer 4 8-bit Prescaler Register (TM4PS)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
TM4PS
FEA4H
Timer 4 clock = SYSclk
÷
( TM4PS + 1 )
13.4.6 Timer 3 working mode
The functional block diagram of Timer/Counter 3 is as follows.
÷12
÷1
T4T3M.1/T3x12=0
T4T3M.1/T3x12=1
SYSclk
T3 Pin
T3_C/T=0
T3_C/T=1
T3R
T3IF
T3L
(8bits)
RL_T3H
(8bits)
RL_T3L
(8bits)
T3CLKO
Interrupt
Toggle
T3CLKO
T3H
(8bits)
control
TM3PS
Timer/counter 3 working mode: 16-bit auto-reload mode
T3R/T4T3M.3 is the control bit in the T4T3M register. For the specific function description of each bit of the
T4T3M register, see the introduction of the T4T3M register in the previous section.
When T3_C/T=0, the multiplexer is connected to the frequency division output of the system clock, T3 counts the
internal system clock, and works in timing mode. When T3_C/T=1, the multiplexer is connected to the external pulse
input T3, and T3 works in counting mode.
Timer3 of STC microcontroller has two counting rates: one is 12T mode, which is increased by 1 for every 12
clocks, which is the same as traditional 8051 microcontroller, the other is 1T mode, which is increased by 1 for each
clock, and the speed is 12 times of traditional 8051. The rate of T3 is determined by T3x12 in the special function
register T4T3M. If T3x12=0, T3 works in 12T mode, and if T3x12=1, T3 works in 1T mode.
Timer3 has two hidden registers RL_T3H and RL_T3L. RL_T3H and T3H share the same address, and RL_T3L
and T3L share the same address. When T3R=0, that is, when Timer/Counter3 is disabled, the content written to T3L
will be written to RL_T3L at the same time, and the content written to T3H will also be written to RL_T3H at the same
time. When T3R=1, that is, when Timer/Counter3 starts to work, writing content to T3L is not actually written to the
current register T3L, but written to the hidden register RL_T3L, and writing content to T3H is actually also it is not
written into the current register T3H, but into the hidden register RL_T3H, which can cleverly realize the 16-bit reload
timer. When reading the contents of T3H and T3L, the contents be read are the contents of T3H and T3L, not the
contents of RL_T3H and RL_T3L.
The overflow of [T3H, T3L] not only sets the interrupt request flag (T3IF), which causes the CPU to switch to
the timer 3 interrupt routine, but also automatically reloads the contents of [RL_T3H, RL_T3L] into [T3H, T3L].
13.4.7 Timer 4 working mode
The functional block diagram of Timer/Counter 4 is as follows.