STC8A8K64D4 Series Manual
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6.7 Example Routines
6.7.1 System Clock Soure Selection
C language code
// Operating frequency for test is 11.0592MHz
#include "reg51.h"
#include "intrins.h"
#define CKSEL (*(unsigned char volatile xdata *)0xfe00)
#define CLKDIV (*(unsigned char volatile xdata *)0xfe01)
#define HIRCCR (*(unsigned char volatile xdata *)0xfe02)
#define XOSCCR (*(unsigned char volatile xdata *)0xfe03)
#define IRC32KCR (*(unsigned char volatile xdata *)0xfe04)
sfr P_SW2 = 0xba;
sfr P0M1 = 0x93;
sfr P0M0 = 0x94;
sfr P1M1 = 0x91;
sfr P1M0 = 0x92;
sfr P2M1 = 0x95;
sfr P2M0 = 0x96;
sfr P3M1 = 0xb1;
sfr P3M0 = 0xb2;
sfr P4M1 = 0xb3;
sfr P4M0 = 0xb4;
sfr P5M1 = 0xc9;
sfr P5M0 = 0xca;
void main()
{
P0M0 = 0x00;
P0M1 = 0x00;
P1M0 = 0x00;
P1M1 = 0x00;
P2M0 = 0x00;
P2M1 = 0x00;
P3M0 = 0x00;
P3M1 = 0x00;
P4M0 = 0x00;
P4M1 = 0x00;
P5M0 = 0x00;
P5M1 = 0x00;
P_SW2 = 0x80;
CKSEL = 0x00; //Select internal IRC (default)
P_SW2 = 0x00;
/*
P_SW2 = 0x80;
XOSCCR = 0xc0; //Start external crystal
while (!(XOSCCR & 1)); //Waiting for the clock to stabilize
CLKDIV = 0x00; //Clock is not divided
CKSEL = 0x01; //Select external crystal
P_SW2 = 0x00;
*/