STC micro STC8A8K64D4 Series - Timer 0 (Mode 0, Divided Clock Output)

STC8A8K64D4 Series Manual
- 306 -
RETI
MAIN:
MOV SP, #5FH
MOV P0M0, #00H
MOV P0M1, #00H
MOV P1M0, #00H
MOV P1M1, #00H
MOV P2M0, #00H
MOV P2M1, #00H
MOV P3M0, #00H
MOV P3M1, #00H
MOV P4M0, #00H
MOV P4M1, #00H
MOV P5M0, #00H
MOV P5M1, #00H
MOV AUXR,#80H ;1T mode
MOV TMOD,#08H ;Enable GATE, and enable timing when INT0 is 1
MOV TL0,#00H
MOV TH0,#00H
JB INT0,$ ;Wait for INT0 to be low
SETB TR0 ;Start timer
SETB IT0 ;Enable INT0 falling edge interrupt
SETB EX0
SETB EA
JMP $
END
13.5.7 Timer 0 (Mode 0, Divided clock output)
C language code
//Operating frequency for test is 11.0592MHz
#include "reg51.h"
#include "intrins.h"
sfr INTCLKO = 0x8f;
sfr P0M1 = 0x93;
sfr P0M0 = 0x94;
sfr P1M1 = 0x91;
sfr P1M0 = 0x92;
sfr P2M1 = 0x95;
sfr P2M0 = 0x96;
sfr P3M1 = 0xb1;
sfr P3M0 = 0xb2;
sfr P4M1 = 0xb3;
sfr P4M0 = 0xb4;
sfr P5M1 = 0xc9;
sfr P5M0 = 0xca;
void main()