STC micro STC8A8K64D4 Series - ADC Extended Configuration Registers (ADCEXCFG)

STC8A8K64D4 Series Manual
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ADC clock F
ADC
SYSclk/2/(SPEED+1)
Enable signal of
ADC_POWER
Start signal
ADC_START
Finishing sigal
ADC_FLAG
Analog input channel
ADCx_IN
Begin selecting channel
Begin
sampling
End
sampling
Close channel and
begin conversion
Conversion
finish
Preparation
time T
setup
(CSSETUP+1)
Holding time T
hold
(CSHOLD+1)
采样时间T
duty
(SMPDUTY+1)
Conversion time T
convert
(10位ADC为10个ADC时钟)
(12位ADC为12个ADC时钟)
The whole timing Diagram Of ADC
17.1.5 ADC Extended configuration registers (ADCEXCFG)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
ADCEXCFG
FEADH
-
-
ADCETRS[1:0]
-
CVTIMESEL[2:0]
ADCETRS[1:0] : ADC external trigger pin ADC_ETR control bit
ADCETRS[1:0]
ADC_ETR configure
0x
Diable ETR function
10
Enable ADC_ETR rising edge to trigger ADC
11
Enable ADC_ETR falling edge to trigger ADC
Note: Before using this function, the ADC power switch in ADC_CONTR must be turned on, and the
corresponding ADC channel must be set
CVTIMESEL[2:0] : ADC automatic conversion times selection
CVTIMESEL [2:0]
ADC automatic conversion times
0xx
One time
100
Convert 2 times and take the average
101
Convert 4 times and take the average
110
Convert 8 times and take the average
111
Convert 16 times and take the average
Note: When the ADC automatic many conversions function is enabled, the ADC interrupt flag will only be set
to 1 after the ADC automatically converts to the set number of times (for example, set CVTIMESEL to 101B,
that is, the ADC automatically converts 4 times and takes the average value, the ADC interrupt flag will be set
to 1 after every 4 ADC conversions completed)