STC micro STC8A8K64D4 Series - SPI_DMA Transfer Total Byte Register (DMA_SPI_AMT); SPI_DMA Transfer Complete Byte Register (DMA_SPI_DONE); SPI_DMA Send Address Registers (Dma_Spi_Txax); SPI_DMA Receive Address Registers (Dma_Spi_Rxax)

STC8A8K64D4 Series Manual
- 644 -
23.4.4 SPI_DMA transfer total byte register (DMA_SPI_AMT)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
DMA_SPI_AMT
FA23H
DMA_SPI_AMT: Set the number of bytes that need to read and write data.
Note: The actual number of bytes read and written is (DMA_SPI_AMT+1), that is, when DMA_SPI_AMT
is set to 0, 1 byte is transferred, and when DMA_SPI_AMT is set to 255, 256 bytes are transferred.
23.4.5 SPI_DMA transfer complete byte register (DMA_SPI_DONE)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
DMA_SPI_DONE
FA24H
DMA_SPI_DONE: The number of bytes that have been read and written currently.
23.4.6 SPI_DMA Send Address Registers (DMA_SPI_TXAx)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
DMA_SPI_TXAH
FA25H
ADDR[15:8]
DMA_SPI_TXAL
FA26H
ADDR[7:0]
DMA_SPI_TXA: Set the source address when reading and writing data. Data will be read from this address when the
SPI_DMA operation is performed.
23.4.7 SPI_DMA Receive Address Registers (DMA_SPI_RXAx)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
DMA_SPI_RXAH
FA27H
ADDR[15:8]
DMA_SPI_RXAL
FA28H
ADDR[7:0]
DMA_SPI_RXA: Set the target address when reading and writing data. Data will be written from this address when
the SPI_DMA operation is performed.
23.4.8 SPI_DMA Configuration Register 2 (DMA_SPI_CFG2)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
DMA_SPI_CFG2
FA29H
-
-
-
-
-
WRPSS
SSS[1:0]
WRPSS: Enable SS pin control bit during SPI_DMA process
0: During the SPI_DMA transfer process, the SS pin is not automatically controlled
1: During the SPI_DMA transfer process, the SS pin is automatically pulled down, and the original state is
automatically restored after the transfer is completed.
SSS[1:0]: During the SPI_DMA process, control the SS selection bit automatically
SSS[1:0]
SS pin
00
P1.2
01
P2.2
10
P7.4
11
P3.5