Timer/counter 4 working mode: 16-bit auto-reload mode
T4R/T4T3M.7 is the control bit in the T4T3M register. For the specific function description of each bit of the
T4T3M register, see the introduction of the T4T3M register in the previous section.
When T4_C/T=0, the multiplexer is connected to the frequency division output of the system clock, T4 counts the
internal system clock, and works in timing mode. When T4_C/T=1, the multiplexer is connected to the external pulse
input T4, and T4 works in counting mode.
Timer4 of STC microcontroller has two counting rates: one is 12T mode, which is increased by 1 for every 12
clocks, which is the same as traditional 8051 microcontroller, the other is 1T mode, which is increased by 1 for each
clock, and the speed is 12 times of traditional 8051. The rate of T4 is determined by T4x12 in the special function
register T4T3M. If T4x12=0, T4 works in 12T mode, and if T4x12=1, T4 works in 1T mode.
Timer4 has two hidden registers RL_T4H and RL_T4L. RL_T4H and T4H share the same address, and RL_T4L
and T4L share the same address. When T4R=0, that is, when Timer/Counter4 is disabled, the content written to T4L
will be written to RL_T4L at the same time, and the content written to T4H will also be written to RL_T4H at the same
time. When T4R=1, that is, when Timer/Counter4 starts to work, writing content to T4L is not actually written to the
current register T4L, but written to the hidden register RL_T4L, and writing content to T4H is actually also it is not
written into the current register T4H, but into the hidden register RL_T4H, which can cleverly realize the 16-bit reload
timer. When reading the contents of T4H and T4L, the contents be read are the contents of T4H and T4L, not the
contents of RL_T4H and RL_T4L.
The overflow of [T4H, T4L] not only sets the interrupt request flag (T4IF), which causes the CPU to switch to
the timer 4 interrupt routine, but also automatically reloads the contents of [RL_T4H, RL_T4L] into [T4H, T4L].
13.4.8 Timer 3 calculation formula
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