STC micro STC8A8K64D4 Series - Data Exchange between UART2 and Memory (UR2 T_DMA，UR2 R_DMA); UR2 T_DMA Configuration Register (DMA_UR2 T_CFG); UR2 T_DMA Control Register (DMA_UR2 T_CR); UR2 T_DMA Status Register (DMA_UR2 T_STA)

STC8A8K64D4 Series Manual
- 648 -
23.6 Data exchange between UART2 and memory (UR2T_DMA，
UR2R_DMA)
23.6.1 UR2T_DMA Configuration Register (DMA_UR2T_CFG)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
DMA_UR2T_CFG
FA40H
UR2TIE
-
-
-
UR2TIP[1:0]
UR2TPTY[1:0]
UR2TIE: UR2T_DMA interrupt enable control bit
0: Disable UR2T_DMA interrupt
1: Enable UR2T_DMA interrupt
UR2TIP[1:0]: UR2T_DMA interrupt priority control bits
UR2TIP[1:0]
Interrupt priority
00
Lowest (0)
01
Lower (1)
10
Higher (2)
11
Highest (3)
UR2TPTY[1:0]: UR2T_DMA Data bus access priority control bits
UR2TPTY [1:0]
Bus access priority
00
Lowest (0)
01
Lower (1)
10
Higher (2)
11
Highest (3)
23.6.2 UR2T_DMA Control Register (DMA_UR2T_CR)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
DMA_UR2T_CR
FA41H
ENUR2T
TRIG
-
-
-
-
-
-
ENUR2T: UR2T_DMA function enable control bit
0: Disable UR2T_DMA function
1: Enable UR2T_DMA function
TRIG: UR2T_DMA UART1 transmit trigger control bit
0: Write 0 is invalid
1: Write 1 to start UR2T_DMA automatically sending data.
23.6.3 UR2T_DMA Status Register (DMA_UR2T_STA)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
DMA_UR2T_STA
FA42H
-
-
-
-
-
TXOVW
-
UR2TIF
UR2TIF: UR2T_DMA interrupt request flag bit. When the UR2T_DMA data transmission is completed, the hardware
automatically sets UR2TIF to 1, and if the UR2T_DMA interrupt is enabled, the interrupt service routine is entered.
The flag bit needs to be cleared by software.
TXOVW: UR2T_DMA data coverage flag. When UR2T_DMA is in the process of data transmission, and the UART
writes the SBUF register to trigger the UART to send data again, the data transmission will fail. At this time, the
hardware will automatically set TXOVW to 1. The flag bit needs to be cleared by software.
23.6.4 UR2T_DMA transfer total byte register (DMA_UR2T_AMT)
Symbol
Address
B7
B6
B5
B4
B3
B2
B1
B0
DMA_UR2T_AMT
FA43H
DMA_UR2T_AMT: Set the number of bytes of data that needs to be automatically sent.
Note: The actual number of bytes is (DMA_UR2T_AMT+1), that is, when DMA_UR2T_AMT is set to 0, 1
byte is transferred, and when DMA_UR2T_AMT is set to 255, 256 bytes are transferred.