STC micro STC8A8K64D4 Series - Page 28

STC8A8K64D4 Series Manual
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Pin number
name
type
description
LQFP64
LQFP48
LQFP44
PDIP40
32
24
23
26
P3.5
I/O
Standard IO port
T1
I
Timer1 external input
T0CLKO
O
Clock out of timer 0
ECI_4
I
External pulse input of PCA
SS_4
I
Slave selection of SPI (it is output with regard to master)
PWMFLT
I
Enhance PWM external anomaly detection pin
33
25
P5.0
I/O
Standard IO port
RxD3_2
I
Input of USART3
CMP+_2
I
Positive input of comparator
34
26
P5.1
I/O
Standard IO port
TxD3_2
O
Transmit pin of USART3
CMP+_3
I
Positive input of comparator
35
27
24
27
P3.6
I/O
Standard IO port
INT2
I
External interrupt 2
WR_2
O
WRITE signal of external bus
RxD_2
I
Input of USART1
CMP-
I
Negative input of comparator
36
28
25
28
P3.7
I/O
Standard IO port
INT3
I
External interrupt 3
RD_2
O
READ signal of external bus
TxD_2
O
Transmit pin of USART1
CMP+
I
Positive input of comparator
37
29
26
29
P4.1
I/O
Standard IO port
ALE
O
Address latch signal
CMPO_2
O
Output of comparator
38
P7.0
I/O
Standard IO port
CCP0_3
I/O
Capture input and pulse output of PCA0
39
P7.1
I/O
Standard IO port
CCP1_3
I/O
Capture input and pulse output of PCA1
40
P7.2
I/O
Standard IO port
CCP2_3
I/O
Capture input and pulse output of PCA2
41
P7.3
I/O
Standard IO port
CCP3_3
I/O
Capture input and pulse output of PCA3
42
30
27
30
P2.0
I/O
Standard IO port
A8
I
Address bus
PWM0
O
Enhanced PWM channel 0 output pin
RSTSV
-
The initial level of the port can be configured when the ISP
downloads
43
31
28
P4.2
I/O
Standard IO port
RD_3
O
READ signal of external bus
TxD2_2
O
Transmit pin of USART2