STC micro STC8A8K64D4 Series - Page 292

STC8A8K64D4 Series Manual
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sfr P6M0 = 0xcc;
sfr P6M1 = 0xcb;
sfr P7M0 = 0xe2;
sfr P7M1 = 0xe1;
sfr P_SW2 = 0xba;
#define P3INTE (*(unsigned char volatile xdata *)0xfd03)
#define P3INTF (*(unsigned char volatile xdata *)0xfd13)
#define P3IM0 (*(unsigned char volatile xdata *)0xfd23)
#define P3IM1 (*(unsigned char volatile xdata *)0xfd33)
void main()
{
P0M0 = 0x00;
P0M1 = 0x00;
P1M0 = 0x00;
P1M1 = 0x00;
P2M0 = 0x00;
P2M1 = 0x00;
P3M0 = 0x00;
P3M1 = 0x00;
P4M0 = 0x00;
P4M1 = 0x00;
P5M0 = 0x00;
P5M1 = 0x00;
P_SW2 |= 0x80;
P3IM0 = 0xff; // high level interrupt
P3IM1 = 0xff;
P3INTE = 0xff; //Enable P3 interrupt
P_SW2 &= ~0x80;
EA = 1;
while (1);
}
//Because the interrupt vector is greater than 31, it cannot be directly compiled in KEIL
//The 13th interrupt entry address must be borrowed
void common_isr() interrupt 13
{
unsigned char psw2_st;
unsigned char intf;
psw2_st = P_SW2;
P_SW2 |= 0x80;
intf = P3INTF;
if (intf)
{
P3INTF = 0x00;
if (intf & 0x01)
{
//P3.0 interrupt
}
if (intf & 0x02)
{
//P3.1 interrupt
}
if (intf & 0x04)
{