sfr P_SW2 = 0xba;
#define I2CCFG (*(unsigned char volatile xdata *)0xfe80)
#define I2CMSCR (*(unsigned char volatile xdata *)0xfe81)
#define I2CMSST (*(unsigned char volatile xdata *)0xfe82)
#define I2CSLCR (*(unsigned char volatile xdata *)0xfe83)
#define I2CSLST (*(unsigned char volatile xdata *)0xfe84)
#define I2CSLADR (*(unsigned char volatile xdata *)0xfe85)
#define I2CTXD (*(unsigned char volatile xdata *)0xfe86)
#define I2CRXD (*(unsigned char volatile xdata *)0xfe87)
sfr P0M1 = 0x93;
sfr P0M0 = 0x94;
sfr P1M1 = 0x91;
sfr P1M0 = 0x92;
sfr P2M1 = 0x95;
sfr P2M0 = 0x96;
sfr P3M1 = 0xb1;
sfr P3M0 = 0xb2;
sfr P4M1 = 0xb3;
sfr P4M0 = 0xb4;
sfr P5M1 = 0xc9;
sfr P5M0 = 0xca;
sbit SDA = P1^4;
sbit SCL = P1^5;
bit isda; //Device address flag
bit isma; //Storage address flag
unsigned char addr;
unsigned char pdata buffer[256];
void I2C_Isr() interrupt 24
{
_push_(P_SW2);
P_SW2 |= 0x80;
if (I2CSLST & 0x40)
{
I2CSLST &= ~0x40; //Handle the START event
}
else if (I2CSLST & 0x20)
{
I2CSLST &= ~0x20; //Handle the RECV event
if (isda)
{
isda = 0; //Handle the RECV event (RECV DEVICE ADDR)
}
else if (isma)
{
isma = 0; //Handle the RECV event (RECV MEMORY ADDR)
addr = I2CRXD;
I2CTXD = buffer[addr];
}
else
{
buffer[addr++] = I2CRXD; //Handle the RECV event (RECV DATA)
}