ST STM32G473

RM0440 Rev 4 1247/2126
RM0440 General-purpose timers (TIM2/TIM3/TIM4/TIM5)
1343
Figure 376. Counter timing diagram, Update event with ARPE=1 (counter underflow)
MSv62314V1
FD 36
tim_psc_ck
tim_cnt_ck
Counter register
Update event (UEV)
Counter underflow
Update interrupt flag
(UIF)
00 02 03 04 05 06 0701
CEN
Auto-reload preload
register
Write a new value in TIMx_ARR
06 05 04 03 02 01
FD 36
Auto-reload active
register