ST STM32G473 User Manual

RM0440
86/2126 RM0440 Rev 4
A mapping formula shows how to reference each word in the alias region to a corresponding
bit in the bit-band region. The mapping formula is:
bit_word_addr = bit_band_base + (byte_offset x 32) + (bit_number × 4)
where:
– bit_word_addr is the address of the word in the alias memory region that maps to
the targeted bit
– bit_band_base is the starting address of the alias region
– byte_offset is the number of the byte in the bit-band region that contains the
targeted bit
– bit_number is the bit position (0-7) of the targeted bit
Example
The following example shows how to map bit 2 of the byte located at SRAM1 address
0x20000300 to the alias region:
0x22006008 = 0x22000000 + (0x300*32) + (2*4)
Writing to address 0x22006008 has the same effect as a read-modify-write operation on bit
2 of the byte at SRAM1 address 0x20000300.
Reading address 0x22006008 returns the value (0x01 or 0x00) of bit 2 of the byte at SRAM1
address 0x20000300 (0x01: bit set; 0x00: bit reset).
2.4 Embedded SRAM
The STM32G4 Series category 3 devices feature up to 128 Kbytes SRAM:
• 80 Kbytes SRAM1 (mapped at address 0x2000 0000)
• 16 Kbytes SRAM2 (mapped at address 0x2001 4000)
• 32 Kbytes CCM SRAM (mapped at address 0x1000 0000 and end of SRAM2)
The STM32G4 Series category 4 devices feature up to 112 Kbytes SRAM:
• 80 Kbytes SRAM1 (mapped at address 0x2000 0000)
• 16 Kbytes SRAM2 (mapped at address 0x2001 4000)
• 16 Kbytes CCM SRAM (mapped at address 0x1000 0000 and end of SRAM2)
The STM32G4 Series category 2 devices feature up to 32 Kbytes SRAM:
• 16 Kbytes SRAM1 (mapped at address 0x2000 0000)
• 6 Kbytes SRAM2 (mapped at address 0x2000 4000)
• 10 Kbytes CCM SRAM (mapped at address 0x1000 0000 and end of SRAM2)
These SRAM can be accessed as bytes, half-words (16 bits) or full words (32 bits). These
memories can be addressed at maximum system clock frequency without wait state and
thus by both CPU and DMA.
The CPU can access the SRAM1 through the system bus or through the ICode/DCode
buses when boot from SRAM1 is selected or when physical remap is selected
(Section 10.2.1: SYSCFG memory remap register (SYSCFG_MEMRMP) in the SYSCFG
controller). To get the maximum performance on SRAM1 execution, physical remap should
be selected (boot or software selection).
CCM SRAM is mapped at address 0x1000 0000.

ST STM32G473 Specifications

General

Brand	ST
Model	STM32G473
Category	Microcontrollers
Language	English