General-purpose timers (TIM15/TIM16/TIM17) RM0440
1346/2126 RM0440 Rev 4
30.4 TIM15/TIM16/TIM17 functional description
30.4.1 Block diagram
Figure 439. TIM15 block diagram
1. Refer to Section 30.4.15: Using the break function for details.
MSv62371V3
UEV
UEV
CC1I
CC2I
+/-
Stop, clear or up/down
tim_ti1fp1
tim_ti2fp2
tim_trgi
tim_trgo
tim_oc1ref
tim_oc2ref
REP register
Reset, enable, up, count
tim_psc_ck
tim_ic1tim_ti1_fp1
TRG
tim_itr
tim_trc
tim_ti1f_ed
CC1I
CC2I
tim_ti1
tim_ti2
TIM_CH1
TIM_CH2
tim_oc1
tim_oc2
TIM_CH1
TIM_CH2
TIM_CH1N
tim_oc1n
PSC
prescaler
CNT counter
tim_cnt_ck
Capture/Compare 1 register
Notes:
Reg
Preload registers transferred
to active registers on U event
according to control bit
Event
Interrupt & DMA output
tim_sys_brk
SBIF
Auto-reload register
Capture/Compare 2 register
Prescaler
Prescaler
XOR
UI
Input
filter &
edge
detector
Break circuitry
(1)
BIF
tim_brk
Input
filter &
edge
detector
(tim_ti2_in0)
tim_ker_ck
DMA interface
IRQ interface
tim_pclk
32-bit APB
bus
tim_cc1_dma
tim_cc2_dma
tim_upd_dma
tim_trg_dma
tim_com_dma
tim_it
Trigger
controller
Slave
controller
mode
DTG registers
DTG
Output
control
Output
control
Repetition
counter
UEV
UEV
(tim_ti1_in0)
tim_ti2_in[0..15]
tim_ti1_in[0..15]
tim_ic2
tim_ti1_fp2
tim_trc
tim_ti1_fp1
tim_ti1_fp2
tim_trc
tim_itr[15..0]
TIM_BKIN
tim_brk_cmp[7:1]
tim_ocref_clr_int
tim_ocref_clr[7..0]