RM0440 Rev 4 1695/2126
RM0440 Low-power universal asynchronous receiver transmitter (LPUART)
1733
38.4.8 Tolerance of the LPUART receiver to clock deviation
The asynchronous receiver of the LPUART works correctly only if the total clock system
deviation is less than the tolerance of the LPUART receiver. The causes which contribute to
the total deviation are:
• DTRA: deviation due to the transmitter error (which also includes the deviation of the
transmitter’s local oscillator)
• DQUANT: error due to the baud rate quantization of the receiver
• DREC: deviation of the receiver local oscillator
• DTCL: deviation due to the transmission line (generally due to the transceivers which
can introduce an asymmetry between the low-to-high transition timing and the high-to-
low transition timing)
where
DWU is the error due to sampling point deviation when the wakeup from low-
power mode is used.
The LPUART receiver can receive data correctly at up to the maximum tolerated deviation
specified in Table 353:
• Number of Stop bits defined through STOP[1:0] bits in the LPUART_CR2 register
• LPUART_BRR register value.
Table 352. Error calculation for programmed baud rates at f
CK
= 100 MHz
Baud rate f
CK
= 100MHz
S.No Desired Actual
Value programmed in the baud
rate register
% Error = (Calculated - Desired)
B.rate / Desired B.rate
1 38400 Baud 38400,04 Baud A2C2A 0,0001
2 57600 Baud 57600,06 Baud 6C81C 0,0001
3 115200 Baud 115200,12 Baud 3640E 0,0001
4 230400 Baud 230400,23 Baud 1B207 0,0001
5 460800 Baud 460804,61 Baud D903 0,001
6 921600 Baud 921625,81 Baud 6C81 0,0028
7 4000 KBaud 4000000,00 Baud 1900 0
8 10000 Kbaud 10000000,00 Baud A00 0
9 20000 Kbaud 20000000,00 Baud 500 0
10 30000 Kbaud 33032258,06 Baud 307 0,1
DTRA DQUANT DREC DTCL DWU++++LPUART receiver tolerance <
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