ST STM32G473 User Manual

AES hardware accelerator (AES) RM0440
1502/2126 RM0440 Rev 4
In ECB decrypt mode, the 128-bit ciphertext input data block C1 in the AES_DINR register
first goes through bit/byte/half-word swapping. The keying sequence is reversed compared
to that of the ECB encryption. The swap result I1 is processed with the AES core set in
decrypt mode, using the formerly prepared decryption key. The decryption result goes
through bit/byte/half-word swapping, then is stored in the AES_DOUTR register as 128-bit
plaintext output data block P1. The ECB decryption continues in this way until the last
complete ciphertext block is decrypted.
Figure 512 illustrates the cipher block chaining (CBC) encryption.
Figure 512. CBC encryption
In CBC encrypt mode, the first plaintext input block, after bit/byte/half-word swapping (P1’),
is XOR-ed with a 128-bit IVI bitfield (initialization vector and counter), producing the I1 input
data for encrypt with the AES core, using a 128- or 256-bit key. The resulting 128-bit output
block O1, after swapping operation, is used as ciphertext C1. The O1 data is then XOR-ed
with the second-block plaintext data P2’ to produce the I2 input data for the AES core to
produce the second block of ciphertext data. The chaining of data blocks continues in this
way until the last plaintext block in the message is encrypted.
If the message size is not a multiple of 128 bits, the final partial data block is encrypted in
the way explained in Section 34.4.6: AES ciphertext stealing and data padding.
Figure 513 illustrates the cipher block chaining (CBC) decryption.
Figure 513. CBC decryption
MSv19107V2
Block cipher
encryption
AES_KEYRx (KEY)
AES_DINR (plaintext P1)
AES_DOUTR (ciphertext C1)
Swap
management
DATATYPE[1:0]
DATATYPE[1:0]
Swap
management
Block cipher
encryption
AES_KEYRx (KEY)
AES_DINR (plaintext P2)
AES_DOUTR (ciphertext C2)
Swap
management
DATATYPE[1:0]
DATATYPE[1:0]
Swap
management
AES_IVRx (init. vector)
input
output
Legend
XOR
I1
I2
O1
O2
Block 1 Block 2
IVI
P1'
P2'
MSv19104V2
Decrypt
AES_KEYRx (KEY)
AES_DINR (ciphertext C1)
AES_DOUTR (plaintext P1)
Swap
management
DATATYPE[1:0]
DATATYPE[1:0]
Swap
management
Decrypt
AES_KEYRx (KEY)
AES_DINR (ciphertext C2)
AES_DOUTR (plaintext P2)
Swap
management
DATATYPE[1:0]
DATATYPE[1:0]
Swap
management
AES_IVRx (IV)
input
output
Legend
XOR
I1
I2
O1
O2
Block 1 Block 2
IVI
P1'
P2'

ST STM32G473 Specifications

General

Brand	ST
Model	STM32G473
Category	Microcontrollers
Language	English