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ST STM32G473

ST STM32G473
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RM0440 Rev 4 1945/2126
RM0440 FD controller area network (FDCAN)
2008
Figure 662. CAN subsystem
CANFDL
CANFDL
MS51818V1
FDCAN_TX1
FDCAN_RX1
Interrupts
interface
CANFDL
RAM
Controller / Arbiter
Message RAM
interface
CAN core
fdcan1_intr0_it
fdcan1_intr1_it
TX Handler
TX prioritization
Frame Synchro
Tx Req Tx State Rx State
Sync
Sync
fdcan_pclk
Control and
Configuration
registers
RX Handler
Acceptance filter
fdcan1_ts[0:15]
CFG_APB
RAM_APB
Ctrl_APB
/ 1..30
CKDIV
Sub system
Config reg
fdcan_tq_ck
32-bit APB bus
fdcan_clk
Message RAM
Buffers
FIFOs
Filters
Configuration
Kernel clock domain
APB clock domain
FDCAN_TX2
FDCAN_RX2
FDCAN_TX3
FDCAN_RX3

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