High-resolution timer (HRTIM) RM0440
910/2126 RM0440 Rev 4
1. In the fixed frequency configuration, the period event must trigger the output set and
the “greater than” compare triggers the output reset (or vice versa the period must
trigger the reset if the “greater-than” compare triggers the set).
2. For variable frequency configuration, the event selected as counter reset source must
also be selected as set or reset source for the timer output (opposite direction as the
“greater than” compare event).
Note: The “greater-than” modes must not be used when the CMP1 and/or CMP3 modes are
controlled by hardware in half and interleaved modes.
Figure 233. Early turn-ON and early turn-OFF behavior in “greater than” PWM mode
The immediate update mode implies that the content of the preload register is transferred
into the active register at the very same time the register is written. When GTCMP1 and/or
GTCMP3 bits are set, their respective preload mechanism is disabled (for
HRTIM_TIMxCMP1 and/or HRTIM_TIMxCMP3 registers), whatever the PREEN bit value.
Note: The compare interrupt flags (CMP1 and CMP3 in HRTIM_TIMxISR) are not generated in
case of late turn-ON and early turn-OFF, as shown on Figure 233.
Note: The “Greater than” comparison must not be done on both CMP1 and CMP3 for the same
output (GTCMP1 and GTCMP3 bits must not be set simultaneously).
27.3.13 Events propagation within or across multiple timers
The HRTIM offers many possibilities for cascading events or sharing them across multiple
timing units, including the master timer, to get full benefits from its modular architecture.
These are key features for converters requiring multiple synchronized outputs.
This section summarizes the various options and specifies whether and how an event is
propagated within the HRTIM.
MSv48376V1
Counter
CMP1
Output (GTCMP1 = 1)
(set on period, reset on CMP1)
« Greater than » PWM mode
CMP1
flag set
CMP1
flag set
Write access to
CMP1
Write access to
CMP1
Write access to
CMP1
Output (GTCMP1 = 0)
(set on period, reset on CMP1)
Regular PWM mode
Update on roll-over
CMP1
flag set
CMP1
flag set
CMP1
flag set
Early turn-On Early turn-Off
CMP1
flag set
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