ST STM32G473 User Manual

Nested vectored interrupt controller (NVIC) RM0440
442/2126 RM0440 Rev 4
14.3 Interrupt and exception vectors
The gray rows in Table 97 describe the vectors without specific position.
Table 97. STM32G4 Series vector table
Position
Priority
Type of
priority
Acronym Description Address
- - - - Reserved 0x0000 0000
- -3 fixed Reset Reset 0x0000 0004
- -2 fixed NMI
Non maskable interrupt. SRAM parity err +
FLASH ECC err + HSE CSS
0x0000 0008
- -1 fixed HardFault All classes of fault 0x0000 000C
- 0 settable MemManage Memory management 0x0000 0010
- 1 settable BusFault Pre-fetch fault, memory access fault 0x0000 0014
- 2 settable UsageFault Undefined instruction or illegal state 0x0000 0018
- - - - Reserved
0x0000 001C -
0x0000 0028
- 3 - - System service call via SWI instruction 0x0000 002C
- 4 - - Monitor 0x0000 0030
- - - - Reserved 0x0000 0034
- 5 settable PendSV Pendable request for system service 0x0000 0038
- 6 settable SysTick System tick timer 0x0000 003C
0 7 settable WWDG Window Watchdog interrupt 0x0000 0040
1 8 settable PVD_PVM PVD through EXTI line 16 interrupt 0x0000 0044
2 9 settable RTC/TAMP/CSS_LSE
RTC/TAMP/CSS on LSE through EXTI line 19
interrupt
0x0000 0048
3 10 settable RTC_WKUP
RTC Wakeup timer through EXTI line 20
interrupt
0x0000 004C
4 11 settable FLASH Flash global interrupt 0x0000 0050
5 12 settable RCC RCC global interrupt 0x0000 0054
6 13 settable EXTI0 EXTI Line0 interrupt 0x0000 0058
7 14 settable EXTI1 EXTI Line1 interrupt 0x0000 005C
8 15 settable EXTI2 EXTI Line2 interrupt 0x0000 0060
9 16 settable EXTI3 EXTI Line3 interrupt 0x0000 0064
10 17 settable EXTI4 EXTI Line4 interrupt 0x0000 0068
11 18 settable DMA1_CH1 DMA1 channel 1 interrupt 0x0000 006C
12 19 settable DMA1_CH2 DMA1 channel 2 interrupt 0x0000 0070
13 20 settable DMA1_CH3 DMA1 channel 3 interrupt 0x0000 0074

ST STM32G473 Specifications

General

Brand	ST
Model	STM32G473
Category	Microcontrollers
Language	English