Analog-to-digital converters (ADC) RM0440
674/2126 RM0440 Rev 4
Figure 141. Interleaved mode on 1 channel in single conversion mode: dual ADC
mode
If DISCEN=1, each “n” simultaneous conversions (“n” is defined by DISCNUM) of the
regular sequence require a regular trigger event to occur.
In this mode, injected conversions are supported. When injection is done (either on master
or on slave), both the master and the slave regular conversions are aborted and the
sequence is restarted from the master (see Figure 142 below).
Figure 142. Interleaved conversion with injection
Alternate trigger mode
This mode is selected by programming bits DUAL[4:0] = 01001.
This mode can be started only on an injected group. The source of external trigger comes
from the injected group multiplexer of the master ADC.
This mode is only possible when selecting hardware triggers: JEXTEN[1:0] must not be 00.
Injected discontinuous mode disabled (JDISCEN=0 for both ADC)
MSv31031V3
MASTER ADC
Trigger
CH1
Sampling
Conversion
CH1
4 ADCCLK
cycles
CH1
CH1
4 ADCCLK
cycles
SLAVE ADC
End of conversion on
master and slave ADC
End of conversion on
master and slave ADC
0.5 ADCCLK
cycle
0.5 ADCCLK
cycle
MS34460V1
ADC1 (master) CH1 CH1 CH1
CH11
CH1 CH1 CH1
CH2 CH2 CH0CH2 CH2 CH2ADC2 (slave)
Injected trigger Resume (always on master)
read
CDR
read
CDR
read
CDR
read
CDR
conversions
aborted
Legend:
Sampling Conversion
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