ST STM32G473

Flexible static memory controller (FSMC) RM0440
538/2126 RM0440 Rev 4
Muxed mode - multiplexed asynchronous access to NOR Flash memory
Figure 65. Muxed read access waveforms
MSv41685V1
A[25:16]
Memory transaction
NBL[x:0]
NEx
NOE
Data driven by memory
NWE
AD[15:0]
NBLSET
HCLK
cycles
ADDSET HCLK cycles DATAST HCLK cycles DATAHLD
HCLK cycles
High
ADDHLD
HCLK
cycles
NADV
Lower address