RM0440 Rev 4 403/2126
RM0440 Direct memory access controller (DMA)
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12.3 DMA implementation
12.3.1 DMA1 and DMA2
DMA1 and DMA2 are implemented with the hardware configuration parameters shown in
the table below.
12.3.2 DMA request mapping
The DMA controller is connected to DMA requests from the AHB/APB peripherals through
the DMAMUX peripheral.
For the mapping of the different requests, refer to the Section 13.3: DMAMUX
implementation.
12.4 DMA functional description
12.4.1 DMA block diagram
Table 85. DMA1 and DMA2 implementation
Feature DMA1 DMA2
Number of channels
Category 2 devices
(1)
Category 3 devices
(1)
Category 4 devices
(1)
6
8
8
6
8
8
1. See Table 1: STM32G4 Series memory density.
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