General-purpose timers (TIM15/TIM16/TIM17) RM0440
1372/2126 RM0440 Rev 4
30.4.13 Combined PWM mode (TIM15 only)
Combined PWM mode allows two edge or center-aligned PWM signals to be generated with
programmable delay and phase shift between respective pulses. While the frequency is
determined by the value of the TIMx_ARR register, the duty cycle and delay are determined
by the two TIMx_CCRx registers. The resulting signals, tim_ocxrefc, are made of an OR or
AND logical combination of two reference PWMs:
• tim_oc1refc (or tim_oc2refc) is controlled by the TIMx_CCR1 and TIMx_CCR2
registers
Combined PWM mode can be selected independently on two channels (one tim_ocx output
per pair of CCR registers) by writing ‘1100’ (Combined PWM mode 1) or ‘1101’ (Combined
PWM mode 2) in the OCxM bits in the TIMx_CCMRx register.
When a given channel is used as a combined PWM channel, its complementary channel
must be configured in the opposite PWM mode (for instance, one in Combined PWM mode
1 and the other in Combined PWM mode 2).
Note: The OCxM[3:0] bit field is split into two parts for compatibility reasons, the most significant
bit is not contiguous with the 3 least significant ones.
Figure 464 represents an example of signals that can be generated using combined PWM
mode, obtained with the following configuration:
• Channel 1 is configured in Combined PWM mode 2,
• Channel 2 is configured in PWM mode 1,
1110 +1+1+1+1+1+1+1 -+1+1+1+1+1+1+1 -
1111 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 -
Table 294. CCR and ARR register change dithering pattern (continued)
-PWM period
LSB value12345678910111213141516
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