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ST STM32G473 User Manual

ST STM32G473
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RM0440 Rev 4 887/2126
RM0440 High-resolution timer (HRTIM)
1083
If the set and reset events are generated with an interval above 3 t
HRTIM
periods, the high-
resolution is always available.
Concurrent set requests/ Concurrent reset requests
When multiple sources are selected for a set event, an arbitration is performed when the set
requests occur within the same f
HRTIM
clock period.
In case of multiple requests from adjacent timers (TIMEVNT1..9), the request which occurs
first is taken into account. The arbitration is done in 2 steps, depending on:
1. the source (CMP4
CMP3 CMP2 CMP1),
2. the delay.
If multiple requests from the master timer occur within the same f
HRTIM
clock period, a
predefined arbitration is applied and a single request is taken into account, whatever the
effective high-resolution setting (from the highest to the lowest priority):
MSTCMP4 → MSTCMP3 → MSTCMP2 → MSTCMP1 → MSTCMPER
Note: It is advised to avoid generating multiple set (reset) requests from the master timer to a
given timer with an interval below 3x
t
HRTIM
to maintain the high-resolution.
When multiple requests internal to the timer occur within the same f
HRTIM
clock period, a
predefined arbitration is applied and the requests are taken with the following priority,
whatever the effective timing (from highest to lowest):
CMP4 → CMP3 → CMP2 → CMP1 → PER
Note: Practically, this is of a primary importance when multiple compare events can be
simultaneously generated or when using auto-delayed compare 2 and compare 4
simultaneously (i.e. when the effective set/reset cannot be determined a priori because it is
related to an external event). In this case, the highest priority signal must be affected to the
CMP4 event.
Last, the highest priority is given to low-resolution events: EXTEVNT1..10, RESYNC
(coming from SYNC event if SYNCRSTx or SYNCSTRTx is set or from a software reset),
update and software set (SST). The update event is considered as having the largest delay
(0x1F if PSC = 0).
As a summary, in case of a close vicinity (events occurring within the same f
HRTIM
clock
period), the effective set (reset) event is arbitrated between:
Any TIMEVNT1..9 event
A single source from the master (as per the fixed arbitration given above)
A single source from the timer
The “low-resolution events”.
The same arbitration principle applies for concurrent reset requests. In this case, the reset
request has the highest priority.
Case 2: clock prescaler CKPSC[2:0] 5
The narrow pulse management is simplified when the high-resolution is not effective.
A set or reset event occurring within the prescaler clock cycle is delayed to the next active
edge of the prescaled clock (as for a counter reset), even if the arbitration is still performed
every t
HRTIM
cycle.

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ST STM32G473 Specifications

General IconGeneral
BrandST
ModelSTM32G473
CategoryMicrocontrollers
LanguageEnglish

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