ST STM32G473 User Manual

High-resolution timer (HRTIM) RM0440
912/2126 RM0440 Rev 4
Counter software reset
TyRST=1 in
HRTIM_CR2
No
Can be done simultaneously with update in
HRTIM_CR2 register
Counter reset caused
by a TIMz compare
TIMzCMPn in
HRTIM_RSTyR
Yes -
Counter reset caused
by external events
EXTEVNTn in
HRTIM_RSTyR
Yes -
Counter reset caused
by a master compare or
a master period
MSTCMPn or
MSTPER in
HRTIM_RSTyR
Yes -
Counter reset caused
by a TIMy compare
CMPn in
HRTIM_RSTyR
Yes -
Counter reset caused
by an update
UPDT in
HRTIM_RSTyR
No
Propagation would result in a lock-up situation
(update causing reset causing update)
Counter reset caused
by HRTIM_SCIN
SYNCRSTy in
HRTIM_TIMyCR
No -
Software update TySWU = 1 No
All software update bits (TxSWU) are grouped in
the HRTIM_CR2 register and can be used for a
simultaneous update
Table 228. TIMx update event propagation (continued)
Source Condition Propagation Comment

ST STM32G473 Specifications

General

Brand	ST
Model	STM32G473
Category	Microcontrollers
Language	English