P2M0 = 0x00;
P2M1 = 0x00;
P3M0 = 0x00;
P3M1 = 0x00;
P4M0 = 0x00;
P4M1 = 0x00;
P5M0 = 0x00;
P5M1 = 0x00;
P_SW2 = 0x80; // Enable XFR access
CMPEXCFG = 0x00;
CMPEXCFG &= ~0x03; //P3.7 is CMP+ input pin
// CMPEXCFG |= 0x01; //P5.0 is CMP+ input pin
// CMPEXCFG |= 0x02; //P5.1 is CMP+ input pin
// CMPEXCFG |= 0x03; // ADC input pin is CMP+ input pin
CMPEXCFG &= ~0x04; //P3.6 is CMP- input pin
// CMPEXCFG |= 0x04; // Internal reference voltage is CMP- input pin
P_SW2 = 0x00; // Disable XFR access
CMPCR2 = 0x00;
CMPCR2 &= ~0x80; // Comparator forward output
// CMPCR2 |= 0x80; // Comparator inverted output
CMPCR2 &= ~0x40; // Enable 0.1us filtering
// CMPCR2 |= 0x40; // Disable 0.1us filtering
// CMPCR2 &= ~0x3f; // Output comparator result directly
CMPCR2 |= 0x10; // Output comparator result after 16 debounce clocks
CMPCR1 = 0x00;
CMPCR1 |= 0x30; // Enable edge interrupt of comparator
// CMPCR1 &= ~0x20; // Disable comparator rising edge interrupt
// CMPCR1 |= 0x20; // Enable comparator rising edge interrupt
// CMPCR1 &= ~0x10; // Disable comparator falling edge interrupt
// CMPCR1 |= 0x10; // Enable comparator falling edge interrupt
// CMPCR1 &= ~0x02; // Disable comparator output
CMPCR1 |= 0x02; // Enable Comparator output
CMPCR1 |= 0x80; // Enable comparator module
while (1)
{
P10 = CMPCR1 & 0x01; // Read comparator comparison result
}
}
Assembly code
; Operating frequency for test is 11.0592MHz
CMPEXCFG EQU 0FEFAH
P_SW2 DATA 0BAH
CMPCR1 DATA 0E6H
CMPCR2 DATA 0E7H
P1M1 DATA 091H
P1M0 DATA 092H
P0M1 DATA 093H
P0M0 DATA 094H
P2M1 DATA 095H
P2M0 DATA 096H