STC micro STC8A8K64D4 Series - Page 457

STC8A8K64D4 Series Manual
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P3M1 DATA 0B1H
P3M0 DATA 0B2H
P4M1 DATA 0B3H
P4M0 DATA 0B4H
P5M1 DATA 0C9H
P5M0 DATA 0CAH
ORG 0000H
LJMP MAIN
ORG 0100H
MAIN:
MOV SP, #5FH
MOV P0M0, #00H
MOV P0M1, #00H
MOV P1M0, #00H
MOV P1M1, #00H
MOV P2M0, #00H
MOV P2M1, #00H
MOV P3M0, #00H
MOV P3M1, #00H
MOV P4M0, #00H
MOV P4M1, #00H
MOV P5M0, #00H
MOV P5M1, #00H
MOV P_SW2,#80H
MOV DPTR,# CMPEXCFG
CLR A
ANL A,#NOT 03H ; P3.7 is CMP+ input pin
; ORL A,#01H ; P5.0 is CMP+ input pin
; ORL A,#02H ; P5.1 is CMP+ input pin
; ORL A,#03H ; ADC input pin is CMP+ input pin
ANL A,#NOT 04H ; P3.6 is CMP- input pin
; ORL A,# 04H ; Internal reference voltage is CMP- input pin
MOVX @DPTR,A
MOV P_SW2,#00H
MOV CMPCR2,#00H
ANL CMPCR2,#NOT 80H ; Comparator forward output
; ORL CMPCR2,#80H ; Comparator inverted output
ANL CMPCR2,#NOT 40H ; Enable 0.1us filtering
; ORL CMPCR2,#40H ; Disable 0.1us filtering
; ANL CMPCR2,#NOT 3FH ; Output comparator result directly
ORL CMPCR2,#10H ; Output comparator result after 16 debounce clocks
MOV CMPCR1,#00H
ORL CMPCR1,#30H ; Enable edge interrupt of comparator
; ANL CMPCR1,#NOT 20H ; Disable comparator rising edge interrupt
; ORL CMPCR1,#20H ; Enable comparator rising edge interrupt
; ANL CMPCR1,#NOT 10H ; Disable comparator falling edge interrupt
; ORL CMPCR1,#10H ; Enable comparator falling edge interrupt
; ANL CMPCR1,#NOT 02H ; Disable comparator output
ORL CMPCR1,#02H ; Enable Comparator output
ORL CMPCR1,#80H ; Enable comparator module
LOOP:
MOV A,CMPCR1
MOV C,ACC.0