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R&S FSW Series - Page 763

R&S FSW Series
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Network and Remote Operation
R&S
®
FSW
763User Manual 1173.9411.02 ─ 43
Bit No. Meaning
7 LIMit 8 FAIL
This bit is set if limit line 8 is violated.
8 to 14 Unused
15 This bit is always 0.
STATus:QUEStionable:LMARgin Register
This register contains information about the observance of limit margins.
A separate LMARgin register exists for each active channel and for each window.
It can be read using the commands
STATus:QUEStionable:LMARgin:CONDition? and
STATus:QUEStionable:LMARgin[:EVENt]?.
Table 13-16: Meaning of the bits used in the STATus:QUEStionable:LMARgin register
Bit No. Meaning
0 LMARgin 1 FAIL
This bit is set if limit margin 1 is violated.
1 LMARgin 2 FAIL
This bit is set if limit margin 2 is violated.
2 LMARgin 3 FAIL
This bit is set if limit margin 3 is violated.
3 LMARgin 4 FAIL
This bit is set if limit margin 4 is violated.
4 LMARgin 5 FAIL
This bit is set if limit margin 5 is violated.
5 LMARgin 6 FAIL
This bit is set if limit margin 6 is violated.
6 LMARgin 7 FAIL
This bit is set if limit margin 7 is violated.
7 LMARgin 8 FAIL
This bit is set if limit margin 8 is violated.
8 to 14 Not used
15 This bit is always 0.
STATus:QUEStionable:POWer Register
The STATus:QUEStionable:POWer register contains information about possible
overload situations that may occur during operation of the R&S FSW. A separate
power register exists for each active channel.
You can read out the register with STATus:QUEStionable:POWer:CONDition? or
STATus:QUEStionable:POWer[:EVENt]?
Remote Control Basics

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