Theory
of
Operation
The AMIGA computer
is
a high-performance system with advanced graphics and
audio features. The principal hardware features consist
of
the 68000 micro-
processor which runs at 7.2 MHz, SI2K RAM, expandable
to
1MB
, and
configurable to 8MB, 2 parallel
va
chips, one control chip (GARY) and 3
custom VLSI chips that provide the unique capabilities for animation, graphics
and sound.
68000 Microprocessor
The 68000
is
the CPU
of
the system. All other resources are under software
control via control data issued from it. All 3 custom chips have control registers
that are written by the 68000.
The 68000 communicates with the rest
of
the computer via its address bus, data
bus and control lines. Notice that
in
the block diagram the 3 custom chips do not
reside directly on the 68000 buses. When the 68000 starts a bus cycle that
is
intended for the custom chips or the display RAM, the bus control chip detects
whether or not the display RAM buses are available. The control chip will not
assert the acknowledge signal
(lOT
ACK) back
to
the 68000 until the display
RAM buses are available. Once the 68000 receives IDTACK
it
completes the bus
cycle. Connecting the display RAM buses
to
the 68000 buses
is
discussed further
in
the section on bus control. Because the display RAM
is
capable
of
approxi-
mately twice the bandwidth
of
the 68000, the 68000
is
usually not delayed by
waiting for the display buses to become available.
The 68000 can fetch instructions from:
Display RAM
ROM
The 68000 can read and write data directly to:
Display RAM
Parallel
va
Chips
3 Custom
LC.s
ROM
A-12
Technical Reference
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