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LSIS LSLV-S100 - Page 252

LSIS LSLV-S100
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238
Learning Advanced Features
Analog Pulse Output Setting Details
Code
Description
OU.33 Q1 Define
In case of Standard I/O, pulse output TO and multi-function output Q1 share
the same terminal. Set OU.33 to 32kHz pulse output and follow the
instructions below to make wiring connections that configure the open
collector output circuit.
1. Connect a 1/4W, 560Ω resistor between VR and Q1 terminals.
2. Connect EG and CM terminals.
When wiring the resistor, a resistance of 560Ω or less is recommended to
stably provide 32kHz pulse output.
When connecting to a pulse between the S100 inverters, please connect
pulse output(Q1-EG) to pulse input(TI-CM) directly without resistor and wire.
Multiple I/O< -> Multiple I/O : Connect to TO -> TI, CM -> CM
Standard I/O <-> Standard I/O : Connect to Q1 -> P5, EG -> CM
Multiple I/O <-> Standard I/O : Do not support.
OU.62 TO Gain,
OU.63 TO Bias
Adjusts output value and offset. If frequency is selected as an output, it will
operate as shown below.



 
The following graph illustrates that the pulse output (TO) changes depend on
OU.62 (TO Gain) and OU.63 (TO Bias) values. The Y-axis is an analog
output current(032kHz), and X-axis is % value on output item.
For example, if the maximum frequency set with dr.20 (Max Freq) is 60Hz

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