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Mitsubishi Electric MELSEC iQ-R Series - Page 1222

Mitsubishi Electric MELSEC iQ-R Series
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1220
11 PROCESS CONTROL INSTRUCTIONS
11.2 I/O Control Instructions
The following is the processing block diagram of the S.DUTY instruction. (The numbers (1) to (7) in the diagram indicate the
order of the processing.)
BW
BB2
BB3
BB4
AND
AND
AND
SPA
ERRI¸MHI
ERRI¸MLI
ERRI¸DMLI
E1
(1)
(2) (3) (4)
(7)
(6)(5)
MODE
MHA
MLA
DMLA
TRKF BB1
OR
(7)
MAN
Output
ON time
conversion
Output
conversion
Upper limit alarm
Lower limit alarm
Variation rate alarm
Reset windup
Variation rate,
upper/lower
limiter
Mode
determination
Input addition
Loop stop
determination
Alarm clear
RUN (SPA=0)
STOP
(SPA=1)
MAN, CMB, CMV, LCM
Other than
MAN, CMB,
CMV, LCM
MH, ML, DML CTDUTYMV MVP
Loop stop
processing
BW=Last value
OFF (all bits)
OFF (all bits)

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