Mitsubishi Electric MELSEC iQ-R Series - Lead-Lag Compensation

11 PROCESS CONTROL INSTRUCTIONS
11.3 Control Operation Instructions
1287
11
Lead-lag compensation
S.LLAG
This instruction performs lead-lag compensation for the input data and outputs the operation result.
■Execution condition
Setting data
■Description, range, data type
■Applicable devices
Ladder ST
ENO:=S_LLAG(EN,s1,s2,d1,d2);
FBD/LD
Instruction Execution condition
S.LLAG
Operand Description Range Data type
(s1) Input data start device Refer to "Input data". Word
(d1) Block memory start device Refer to "Block memory". Single-precision real
number
(s2) Operation constant start device Refer to "Operation constant". Word
(d2) Local work memory start device Refer to "Local work memory". Single-precision real
number
EN Execution condition  Bit
ENO Execution result  Bit
Operand Bit Word Double word Indirect
specification
Constant Others
X, Y, M, L,
SM, F, B, SB,
FX, FY
J\ T, ST, C, D, W,
SD, SW, R, ZR,
RD
U\G, J\,
U3E\(H)G
Z LT, LST,
LC
LZ K, H E $
(s1)         
(d1)         
(s2)         
(d2)         
RnCPU
RnENCPU
RnSFCPU RnSFCPURnPCPURnPCPU
(Standard) (Safety)
(Redundant) (Process)
(s1) (d1) (s2) (d2)
EN ENO
d1
d2
s1
s2