Mitsubishi Electric MELSEC iQ-R Series - Twos Complement of 32-Bit Binary Data (Sign Inversion)

6 BASIC INSTRUCTIONS
6.6 Data Conversion Instructions
469
6
Two's complement of 32-bit binary data (sign inversion)
DNEG(P)
These instructions invert the sign of 32-bit binary device.
■Execution condition
Setting data
■Description, range, data type
■Applicable devices
Processing details
• These instructions invert the sign of the 32-bit binary data in the device specified by (d) and store the inverted data in the
device specified by (d).
• The instructions are used to invert positive and negative signs.
Ladder ST
ENO:=DNEG(EN,d);
ENO:=DNEGP(EN,d);
FBD/LD
Instruction Execution condition
DNEG
DNEGP
Operand Description Range Data type Data type (label)
(d) Start device where the data subjected to two's complement
is stored
 32-bit signed binary ANY32
EN Execution condition  Bit BOOL
ENO Execution result  Bit BOOL
Operand Bit Word Double word Indirect
specification
Constant Others
X, Y, M, L,
SM, F, B, SB,
FX, FY
J\ T, ST, C, D, W,
SD, SW, FD, R,
ZR, RD
U\G, J\,
U3E\(H)G
Z LT, LST,
LC
LZ K, H E $
(d)         
RnCPU
RnENCPU
RnSFCPU RnSFCPURnPCPURnPCPU
(Standard) (Safety)
(Redundant) (Process)
(d)
EN ENO
d
1
(d)
(d)
b31 b0
111 1111 10 00100
b31 b0
000 00 0 001 11100
111 1111 10 00100
000 0000 00 00000
-
 -218460
 218460
Before execution
Sign conversion
After execution